A half adder is a simple digital circuit that adds two single-bit binary numbers together. It takes two inputs (called A and B) and produces two outputs: a Sum bit and a Carry bit. That’s the entire job. It’s the most basic building block of addition in digital electronics, and understanding it makes everything from full adders to complete processors easier to grasp.
What the Two Outputs Mean
When you add two single-bit numbers in binary, you can only be working with 0s and 1s. The Sum output represents the result of that addition in the ones place, while the Carry output represents any overflow into the next column, just like carrying a 1 in decimal arithmetic.
Think of adding 1 + 1 in binary. The answer is 10 (which equals 2 in decimal). The “0” is the Sum, and the “1” that moves to the next column is the Carry. A half adder captures exactly this behavior with just two logic gates.
The Truth Table
There are only four possible input combinations, which makes the half adder easy to map out completely:
- A = 0, B = 0: Sum = 0, Carry = 0 (zero plus zero is zero)
- A = 0, B = 1: Sum = 1, Carry = 0 (zero plus one is one)
- A = 1, B = 0: Sum = 1, Carry = 0 (one plus zero is one)
- A = 1, B = 1: Sum = 0, Carry = 1 (one plus one is two, written as “10” in binary)
Two patterns emerge from this table. The Sum output is 1 only when exactly one of the inputs is 1, not both. The Carry output is 1 only when both inputs are 1. Those two patterns map directly to two well-known logic gates.
The Two Logic Gates Inside
A half adder is built from just two components: an XOR gate and an AND gate.
The XOR (exclusive OR) gate produces the Sum. It outputs a 1 when the inputs are different from each other, and a 0 when they match. That’s exactly the pattern from the truth table: if one input is 1 and the other is 0, the sum is 1. If both are the same (both 0 or both 1), the sum is 0.
The AND gate produces the Carry. It outputs a 1 only when both inputs are 1. This makes intuitive sense: you only need to carry a value to the next column when both bits being added are 1.
Written as Boolean expressions:
- Sum = A XOR B
- Carry = A AND B
That’s the entire circuit. Two inputs feed into both gates simultaneously, and each gate independently produces its output. There’s no feedback loop or sequencing involved. The inputs go in, the outputs come out, and the addition is done.
Why It’s Called “Half” an Adder
The name comes from what the circuit can’t do. A half adder handles two input bits, but it has no way to accept a carry-in from a previous addition. When you’re adding multi-bit binary numbers (say, two 8-bit numbers), each column after the first might need to account for a carry coming in from the column to its right.
A full adder solves this by accepting three inputs: A, B, and a carry-in bit. It’s essentially built from two half adders chained together with an extra OR gate. The first half adder adds A and B, and the second half adder adds that result to the carry-in. So the half adder really is “half” of what you need for general-purpose binary addition.
The first column of a multi-bit addition has no previous carry to worry about, so a half adder works perfectly there. Every subsequent column needs a full adder. This is why you’ll often see one half adder paired with a chain of full adders in a complete adding circuit.
Building It With Other Gates
While the XOR-and-AND version is the cleanest design, you can also build a half adder entirely from NAND gates. This matters in chip manufacturing because NAND gates are often the cheapest and fastest to fabricate. It takes five NAND gates to replicate the same behavior. The trade-off is a slightly more complex layout for potentially better performance in certain chip technologies.
Where Half Adders Show Up
Half adders appear wherever single-bit addition without a carry-in is needed. They’re foundational components inside arithmetic logic units (ALUs), the part of a processor that handles math and comparison operations. Beyond straightforward addition, they’re used in circuits that calculate memory addresses, decode binary-coded decimal values, and compute table index offsets.
In practice, you rarely encounter a lone half adder doing useful work. Its value is as a building block. Once you understand how two logic gates can add two bits, scaling up to full adders, ripple-carry adders, and eventually complete processors is a matter of repeating and connecting the same core idea: break addition into single-bit steps, handle the carry, and chain the results together.