How to Calculate Propagation Delay: Formula & Examples

Propagation delay is the time it takes a signal to travel from one point to another, and the core calculation is simple: divide the distance by the speed the signal travels. The formula is tp = d / v, where d is the distance and v is the signal’s velocity through the medium. What makes this interesting (and sometimes tricky) is that “velocity” changes depending on the medium, and the term “propagation delay” means slightly different things in networking, digital logic, and PCB design. Here’s how to calculate it in each context.

The Core Formula

Every propagation delay calculation starts from the same physics. A signal moves through a medium at some fraction of the speed of light (3 × 108 meters per second in a vacuum). The delay equals the distance divided by that speed:

Propagation delay = distance / signal velocity

In free space, an electromagnetic signal covers 1 kilometer in about 3.33 microseconds. But signals in cables, circuit board traces, and fiber optic lines move slower than light in a vacuum. How much slower depends on the material, and that’s captured by something called the velocity factor.

Velocity Factor for Common Media

The velocity factor is the percentage of the speed of light that a signal actually achieves in a given medium. To get the real signal speed, multiply the speed of light by the velocity factor. Here are typical values:

  • Air-dielectric coaxial cable (Heliax): 93%
  • RG-6 / RG-11 coaxial cable: 83%
  • RG-8/U coaxial (foamed polyethylene): 77%
  • Cat-7 twisted pair: 74–79%
  • Cat-5e twisted pair: 64%
  • Optical fiber (silica glass): 67%

So a signal in Cat-5e cable travels at roughly 0.64 × 3 × 108 = 1.92 × 108 meters per second. Over a 100-meter cable run, the propagation delay would be 100 / (1.92 × 108) = about 0.52 microseconds. That’s fast, but it adds up across long distances or when combined with other types of delay.

Propagation Delay in Networking

In computer networking, propagation delay is one of four delay types that make up the total end-to-end latency of a packet: processing delay, queuing delay, transmission delay, and propagation delay. The formula stays the same:

Propagation delay = d / s

where d is the length of the physical link and s is the propagation speed in that medium (close to 3 × 108 m/s for copper and fiber).

This is distinct from transmission delay, which is the time to push all the bits of a packet onto the wire. Transmission delay equals the packet size (in bits) divided by the link’s data rate (in bits per second). A 16,000-bit packet on a 100 Mbps link takes 0.16 milliseconds to transmit. But the propagation delay on a 2 km link is only about 6.67 microseconds, roughly 24 times smaller.

On short links with slow data rates, transmission delay dominates. On long links with fast data rates, propagation delay dominates. Consider a 1,000 km link at 1 Gbps: the propagation delay is about 3.3 milliseconds, while transmitting 16,000 bits takes only 0.016 milliseconds. The signal spends almost all its time physically traveling, not being pushed onto the wire.

For total end-to-end delay across multiple links, you sum up the transmission and propagation delays for each link, plus any queuing and processing delays at intermediate routers. Queuing delay varies with traffic conditions and is the hardest to predict. Processing and propagation delays on individual short links are often small enough to be negligible compared to transmission and queuing delays, but propagation delay across continent-scale distances is anything but negligible.

Propagation Delay in Digital Logic

In digital circuits, propagation delay measures how long a logic gate takes to respond to a change at its input. It’s defined as the time between the input signal crossing the 50% voltage point and the output signal crossing the 50% voltage point. If your supply voltage is 3.3V, you measure from when the input hits 1.65V to when the output hits 1.65V.

There are two values to track:

  • tPHL: the delay when the output switches from high to low
  • tPLH: the delay when the output switches from low to high

These two numbers are rarely identical because the transistors that pull the output high and low have different characteristics. The overall propagation delay of a gate is typically reported as the average of tPHL and tPLH.

You won’t usually calculate these from scratch. Instead, you’ll find them on the component’s datasheet. But when you’re designing a circuit with a chain of logic gates, you add up the propagation delays of each gate in the path to determine whether your circuit can operate at the desired clock speed. If the total propagation delay through the longest path (the “critical path”) exceeds your clock period, the circuit won’t work reliably.

Temperature Effects on Gate Delay

Gate propagation delay isn’t fixed. It shifts with temperature because heat changes how easily electrons move through transistors. The relationship is roughly linear: as temperature rises, electron mobility and the switching threshold both change, which can either speed up or slow down the gate depending on the operating voltage. Research on FPGAs has shown delay changes of around 4% over a temperature sweep up to 100°C at shorter measurement windows, and even larger variations over longer measurement periods. For designs operating near the edge of their timing margins, these shifts matter.

Propagation Delay on PCB Traces

On a printed circuit board, propagation delay depends on the trace geometry and the dielectric material surrounding it. The key variable is the effective dielectric constant (εeff) of the material. The formula is:

Delay per unit length = √εeff / c

where c is the speed of light. For a stripline trace (buried between two reference planes in standard FR-4 with a dielectric constant around 4.2 to 4.7), the signal travels entirely through the board material and moves slower. For a microstrip trace (on the surface with air above it), part of the electromagnetic field travels through air, so the effective dielectric constant is lower and the signal moves faster.

A practical comparison: on a 1,000-mil (1-inch) FR-4 trace, a microstrip line has a propagation delay of about 150 picoseconds, while a stripline has a delay of about 174 picoseconds. That 16% difference comes entirely from the air exposure of the microstrip reducing the effective dielectric constant.

Vias (the vertical connections between PCB layers) also add delay. A 1.6 mm via introduces roughly 23 picoseconds of delay, which is more than the delay of the same length of horizontal trace (about 11 ps for microstrip or 12.5 ps for stripline at 1.6 mm). In high-speed designs running at multi-gigahertz frequencies, these picoseconds add up and can cause timing failures if not accounted for.

Propagation Delay on Transmission Lines

For transmission line analysis (coaxial cables, twisted pairs, PCB traces modeled as transmission lines), propagation delay can also be calculated from the line’s electrical properties. The signal velocity on a lossless transmission line is:

v = 1 / √(L × C)

where L is the inductance per unit length and C is the capacitance per unit length. Both values are determined by the physical geometry and materials of the line. This formula is equivalent to using the velocity factor approach but is more useful when you’re designing a cable or trace and know its electrical parameters rather than looking up a velocity factor from a table. The velocity and impedance calculated this way are independent of frequency for a lossless line, which makes the math clean.

To get the propagation delay for a specific length of line, divide the total length by the velocity: tp = length × √(L × C).

Putting It All Together

Regardless of the domain, the calculation always comes back to the same idea: how far does the signal travel, and how fast does it move? For a quick network homework problem, you divide distance by near-light speed. For a PCB layout, you factor in the dielectric constant of FR-4 and whether your trace is a microstrip or stripline. For digital logic, you look up gate delays on datasheets and sum them along the critical path. The formula is simple, but picking the right velocity for your medium is where the real work happens.