The phase-shifted full bridge (PSFB) is a DC-DC converter topology that has become one of the most widely used circuits for medium-to-high power conversion, roughly in the 500 W to multi-kilowatt range. Its appeal is straightforward: it uses four switches arranged in two “legs” of an H-bridge, drives a high-frequency isolation transformer, and achieves soft switching without adding extra switches or complex auxiliary circuits. The trick is in the timing. Instead of switching all four devices together, each leg is shifted in phase relative to the other, and that phase difference controls how much power reaches the output. But the topology’s apparent simplicity hides a set of engineering trade-offs that have kept researchers busy for decades.
Why Phase Shifting Matters
A conventional full bridge switches its four transistors so that diagonal pairs turn on and off at the same instant. That hard switching generates substantial losses every time a device transitions, because voltage and current overlap during the switch event. As switching frequency rises, those losses become severe enough to limit efficiency and create thermal problems.
In a phase-shifted full bridge, the two legs of the bridge are driven at the same frequency but offset in time. One leg, called the leading leg, begins its switching transition first. The other, the lagging leg, follows after a controlled delay. This phase shift determines the effective duty cycle delivered to the transformer primary: a large shift means a narrow pulse and less power transfer, while zero shift means full duty cycle. The result is pulse-width modulation achieved purely through timing, with no need for additional power-stage components.
The real payoff is zero voltage switching. During the dead time between one switch turning off and its complement turning on, energy stored in the circuit’s inductances charges and discharges the parasitic capacitances of the switches. If enough energy is available, the voltage across an incoming switch falls to zero before it turns on, which virtually eliminates turn-on switching losses. That reduction in loss is what allows designers to push switching frequencies higher, shrink the magnetics, and build more compact converters without sacrificing efficiency.
How Zero Voltage Switching Actually Happens
The mechanism behind ZVS in a PSFB converter relies on the interplay between stored inductive energy and the small parasitic capacitances inside each transistor. When a switch turns off, its drain-to-source capacitance needs to be charged from zero to the bus voltage, while the complementary switch’s capacitance discharges from the bus voltage to zero. If a resonant inductance in the circuit provides enough current during this transition, the capacitances swing fully before the complementary switch receives its gate signal, and that switch turns on with essentially no voltage across it.
This resonant inductance is typically formed by the transformer’s leakage inductance, sometimes supplemented by a small external inductor placed in series with the primary winding. Selecting the right value is surprisingly involved. An analysis published in IET Power Electronics showed that many design models overlook the effects of the transformer’s magnetizing inductance and the dead-time interval when calculating the resonant inductance needed for ZVS, and presented a more accurate equation incorporating both factors to extend ZVS across a wider load range.1IET Power Electronics. Analytical calculation of resonant inductance for zero voltage switching in phase‐shifted full‐bridge converters Getting this value wrong is one of the most common design missteps: too little inductance and ZVS is lost at lighter loads, too much and the converter suffers excessive duty cycle loss on the secondary side.
The leading leg generally achieves ZVS more easily than the lagging leg. When the leading leg transitions, the full load current plus magnetizing current is available to swing the capacitances. The lagging leg, by contrast, transitions after the transformer primary voltage has dropped to zero, so only the energy stored in the resonant inductance is available. At light loads, that stored energy can fall below what is needed, and the lagging leg drops out of soft switching first.
The Light-Load Efficiency Problem
This is the topology’s most persistent headache. At heavy loads, the PSFB converter runs efficiently and soft-switches across all four devices. As the load drops, the energy stored in the resonant inductance shrinks, and ZVS is gradually lost on the lagging leg. Once the switches start hard switching, losses rise sharply and efficiency takes a dive at precisely the operating point where the converter is supposed to be loafing along.
Designers have tried many workarounds. Adding a larger resonant inductor helps maintain ZVS at lighter loads but worsens duty cycle loss at heavy loads, so it trades one problem for another. Pulse-skipping, where the converter stops switching entirely for brief intervals at light load, keeps individual switching cycles efficient but introduces output ripple and can create audible noise.
A more creative approach was demonstrated in a 3 kW prototype designed for photovoltaic-aided electric vehicle charging. Researchers reconfigured the same full-bridge switching network and isolation transformer to operate in flyback mode during light-load conditions, using an online power measurement unit to decide when to switch operating modes. The converter’s inherent device parasitics were leveraged to maintain soft switching even in flyback mode. Compared to a conventional PSFB converter using pulse-skipping control, this scheme improved light-load efficiency from about 72% to 86% at 300 W, cutting total converter losses by nearly 14 percentage points.2Results in Engineering. Phase-shifted full-bridge converter with integrated flyback operation for high-efficiency light-load EV charging That kind of jump at light load is meaningful for applications like EV chargers, which spend much of their operating time topping off batteries at reduced power.
Duty Cycle Loss and Circulating Current
Duty cycle loss is the gap between the duty cycle commanded at the primary side and the effective duty cycle that actually delivers power to the output. In a PSFB converter, when one diagonal pair of switches turns off and the other has not yet turned on, the current in the resonant inductance must reverse direction before power is transferred. During that reversal, the secondary-side rectifiers are not conducting, and the output sees no energy. The time lost to this current commutation reduces the effective duty cycle.
The practical consequence is that the output voltage is lower than a simple duty-cycle calculation would predict. To compensate, the transformer turns ratio must be adjusted, which can push primary-side currents higher and increase conduction losses. A larger resonant inductance, which helps with ZVS, also makes the current commutation slower and worsens duty cycle loss. This is the central design tension in every PSFB converter: the inductance needed for soft switching fights against the inductance budget that keeps duty cycle loss manageable.
Circulating current is a related nuisance. After the active power-delivery interval ends and during the freewheeling interval, current continues to circulate through the primary switches and the transformer primary winding without transferring energy to the output. This circulating current adds conduction losses in the switches and the transformer copper. One approach to reducing it is an energy recovery secondary clamp circuit, which captures energy that would otherwise circulate and returns it to the output. A full-bridge design using this technique demonstrated reduced switch conduction and turn-off losses.3IEEE Xplore. Phase-Shifted Full Bridge DC-DC Converter with Energy Recovery Clamp and Reduced Circulating Current
Secondary Side Rectification and Voltage Ringing
On the output side, the PSFB converter needs rectification to convert the high-frequency AC from the transformer secondary into DC. The two most common arrangements are a center-tapped rectifier with two diodes (or MOSFETs for synchronous rectification) and a full-bridge rectifier with four devices. Each has trade-offs in voltage stress, current sharing, and transformer utilization.
Voltage ringing on the secondary side is a well-known issue. When the primary-side switches transition and the current through the leakage inductance commutates, the sudden change in current interacts with parasitic capacitances on the secondary to produce high-frequency oscillations. These voltage spikes can stress the rectifier devices well beyond the nominal output voltage, forcing designers to use higher-rated components or add lossy snubber circuits.
Synchronous rectification, replacing diodes with actively driven MOSFETs, can significantly improve efficiency because MOSFETs have lower conduction losses at high currents. But the timing of those synchronous rectifier gate signals is critical. If a synchronous rectifier turns off too late, it can shoot through with the opposite device; if it turns off too early, body-diode conduction losses rise. An adaptive delay control method developed for a PSFB converter with gallium nitride (GaN) high-electron-mobility transistors showed that optimizing the dead time between primary and secondary switches according to output power improved efficiency by 0.7% in a 500 W prototype.4Electronics Letters. Adaptive delay control for synchronous rectification phase‐shifted full bridge converter with GaN HEMT The 0.7% gain might sound modest, but at power levels of several kilowatts it translates to several watts less heat that no longer needs a heatsink.
GaN devices bring their own quirks. Their third-quadrant conduction characteristic, which is how they behave when current flows in reverse, differs from silicon MOSFETs and requires careful dead-time optimization to avoid extra losses during the intervals when the body diode would normally conduct.5Electronics Letters. Adaptive delay control for synchronous rectification phase‐shifted full bridge converter with GaN HEMT
Common Mode Noise
Electromagnetic interference (EMI) is a constant concern in switched-mode power supplies, and the PSFB converter has a specific weakness when it comes to common mode (CM) noise. Because the two legs switch at different instants (that is the whole point of phase shifting), the voltage at each leg’s midpoint changes at different times. The displacement currents generated by these midpoints through parasitic capacitances to ground and through the transformer’s inter-winding capacitance do not cancel each other out. In a symmetrically switched converter they would largely cancel, but the phase offset destroys that symmetry, producing significant CM noise.
The resonant inductor adds to the problem. Its voltage during switching affects the electric potentials at the transformer terminals, generating additional CM noise on top of what the midpoint voltages create. One published solution uses a symmetrical resonant inductor combined with a symmetrical transformer configuration to eliminate the resonant inductor’s contribution to CM noise. On top of that, a passive cancellation circuit is introduced to cancel the effect of the midpoint-to-ground voltages.6IEEE Transactions on Industrial Electronics. Reducing Common Mode Noise in Phase-Shifted Full-Bridge Converter The approach works because it addresses both noise sources independently rather than trying to fix one and hoping the other stays manageable.
For engineers designing PSFB converters that must pass regulatory EMI limits, the CM noise issue means that filter design cannot simply be borrowed from conventional full-bridge converters. The asymmetric switching demands either larger input filters, active cancellation techniques, or topology modifications like the symmetrical inductor and transformer arrangement. Ignoring this is a common reason prototypes pass efficiency targets but fail EMI compliance testing.
Thermal Imbalance Between the Legs
Because the leading and lagging legs handle different amounts of reactive energy during switching transitions, they do not share thermal stress equally. The leading leg carries higher current during its ZVS transition, since both the load current and the magnetizing current contribute to swinging the parasitic capacitances. The lagging leg, transitioning with less current, runs cooler. Over time, this thermal imbalance shortens the life of the leading-leg devices and complicates thermal design, since the hottest component sets the thermal limit for the whole converter.7IEEE Transactions on Industry Applications. Novel Phase-Shift Control Technique for Full-Bridge Converter to Reduce Thermal Imbalance Under Light-Load Condition
The imbalance gets worse at light load. At heavy loads, both legs carry substantial current and the relative difference in thermal stress is smaller. At light loads, the leading leg still needs enough current for ZVS while the lagging leg barely switches any current at all. Researchers have proposed periodically swapping which leg leads and which lags, so that over time both legs accumulate similar thermal stress. The trade-off is slightly more complex gate-drive control logic, but the reliability improvement can be worth it for converters expected to operate at partial load for extended periods, such as server power supplies or telecom rectifiers.8IEEE Transactions on Industry Applications. Novel Phase-Shift Control Technique for Full-Bridge Converter to Reduce Thermal Imbalance Under Light-Load Condition
Wide Bandgap Semiconductors in PSFB Converters
Silicon carbide (SiC) and gallium nitride (GaN) transistors are reshaping what PSFB converters can do. Their lower switching losses, faster transitions, and ability to handle higher voltages open up design space that silicon devices cannot match. With SiC MOSFETs on the primary side, designers can push switching frequencies well above what silicon tolerates while maintaining high efficiency, which directly shrinks the transformer and output filter.
A full-brick power module built with SiC MOSFETs in a PSFB topology with synchronous rectification demonstrated this clearly. Operating at 660 to 800 V input and delivering 36 V at 2000 W output, the converter hit a peak efficiency of 94.5% at 200 kHz switching frequency under half-load conditions. Output voltage ripple stayed below 100 mV.9Microelectronics Journal. High-voltage full-brick PSFB converter based on SiC MOSFETs with negative-off gate drive to suppress bridge-arm crosstalk Achieving 200 kHz in a 2 kW converter at that input voltage would be impractical with silicon alone.
SiC’s faster switching speeds create their own design challenge: bridge-arm crosstalk. When one switch in a leg turns on very quickly, the rapid voltage change can couple through the parasitic capacitance of the complementary switch and momentarily turn it on as well, causing a potentially destructive shoot-through event. The SiC-based full-brick module addressed this with a negative-off gate drive, which holds the off-state gate voltage slightly below zero to keep the complementary device firmly off during fast transitions.10Microelectronics Journal. High-voltage full-brick PSFB converter based on SiC MOSFETs with negative-off gate drive to suppress bridge-arm crosstalk This is a detail that barely matters with slower silicon devices but becomes essential once switching speeds enter the nanosecond range.
Where PSFB Converters Show Up in Practice
The topology’s natural habitat is anywhere you need isolated DC-DC conversion in the hundreds-of-watts-to-several-kilowatts range with high efficiency. Server and data center power supplies are probably the single largest application, where PSFB converters typically handle the main DC-DC stage converting a 400 V DC bus down to 12 V or 48 V for the server boards. Telecom rectifiers, which convert AC mains to 48 V DC for base stations and central offices, have used PSFB converters for decades.
Electric vehicle onboard chargers are a growing application. The PSFB stage often handles the isolated DC-DC conversion between the power factor correction stage and the battery. The wide input voltage range of EV applications, combined with the need for high efficiency across varying charge rates, makes the topology’s ZVS capability particularly valuable. The light-load efficiency challenge described earlier is especially relevant here, because Level 2 home chargers spend hours tapering current as the battery fills.
Industrial welding power supplies, battery formation and test equipment, and renewable energy converters (particularly solar optimizers and energy storage interfaces) round out the common applications. In all these cases, the PSFB converter competes primarily with the LLC resonant converter, which achieves soft switching across a wider load range but has a less straightforward relationship between switching frequency and output regulation. The LLC converter regulates output voltage by varying switching frequency rather than phase shift, which complicates EMI filter design since the noise spectrum shifts with load. The PSFB’s fixed-frequency operation makes filter design more predictable, which is one reason it remains popular even as LLC designs have gained ground in consumer electronics.
Transformer Design Considerations
The isolation transformer in a PSFB converter carries design constraints that differ from those in other topologies. Because the transformer sees a bipolar voltage waveform (the primary voltage alternates between positive and negative bus voltage during power delivery, and sits at zero during freewheeling), flux balance is inherently maintained over each switching cycle without needing a series blocking capacitor. This is an advantage over single-ended topologies where a DC bias on the transformer core can push it toward saturation.
Leakage inductance, normally treated as a parasitic to be minimized in transformer design, plays a constructive role in the PSFB converter since it forms part of the resonant inductance needed for ZVS. Designers sometimes intentionally increase leakage by separating primary and secondary windings or inserting a leakage layer between them. The challenge is that higher leakage inductance also increases duty cycle loss, so the leakage must be carefully controlled rather than simply maximized. Some designs use an external inductor in series with the primary to decouple the ZVS inductance from the transformer construction, giving the designer independent control over both parameters.
Inter-winding capacitance is another parameter that matters more in a PSFB converter than in many other topologies. As discussed in the common mode noise section, the transformer’s parasitic capacitance between primary and secondary windings provides a path for CM displacement currents. Winding techniques that reduce inter-winding capacitance, such as increasing the spacing between primary and secondary layers or using Faraday shields, help with EMI performance but can increase leakage inductance. Transformer design for a PSFB converter is fundamentally a multi-objective optimization problem where ZVS performance, duty cycle loss, CM noise, and thermal behavior all compete for the same physical design variables.