A MOSFET’s electrical behavior is captured by a small set of measurable characteristics, chief among them the threshold voltage, the drain-current-versus-gate-voltage transfer curve, and the drain-current-versus-drain-voltage output curve. These characteristics govern how the transistor switches on and off, how much current it can carry, and how efficiently it operates in everything from smartphone processors to electric-vehicle inverters. Understanding them is straightforward once you see what each one actually tells you about the device.
The Two Fundamental Curves
Almost every MOSFET datasheet or textbook starts with two graphs. The first is the output characteristic, which plots drain current against drain-source voltage for several fixed gate voltages. The second is the transfer characteristic, which plots drain current against gate-source voltage at a fixed drain-source voltage. Between them, they describe the device’s entire static behavior.
On the output curve, you see two distinct zones. At low drain-source voltages the MOSFET acts like a voltage-controlled resistor: current rises roughly linearly with the voltage across the device. This is the linear (or triode) region, and it is where the transistor spends most of its time when used as a switch that is fully turned on. As drain-source voltage increases further, the current levels off and barely changes. That plateau is the saturation region, the regime exploited when the MOSFET is used as an amplifier. A third region, cutoff, exists when the gate voltage is below the threshold and essentially no current flows.
The transfer curve, meanwhile, shows the relationship between gate voltage and the drain current that results. Below threshold, current is negligible. Above threshold, current climbs and the steepness of that climb is the transconductance, which quantifies how effectively the gate controls the channel. The transfer curve is where you read two of the most important single numbers for any MOSFET: threshold voltage and peak transconductance.
Threshold Voltage
Threshold voltage is the gate-source voltage at which the MOSFET transitions from “off” to “on.” In practice, no transistor snaps perfectly between zero current and full current; the threshold marks the point where an inversion layer forms at the semiconductor surface and meaningful conduction begins. For standard silicon MOSFETs, threshold voltages typically fall between a fraction of a volt and a few volts, depending on the oxide thickness, the doping in the channel, and the device architecture.
Extracting a precise threshold from a real device is trickier than the textbook picture suggests. The most common approach is to plot drain current versus gate voltage, find the steepest part of the curve, draw a tangent, and read the x-intercept. But that method can be skewed by surface effects and mobility degradation under strong electric fields. A more robust technique looks at how transconductance itself changes with gate voltage: the gate voltage at which the rate of transconductance change peaks gives a threshold value that is less sensitive to those non-ideal effects.1Solid-State Electronics. Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFETs
Several factors shift the threshold in everyday circuits. Applying a voltage between the source and the underlying substrate (the “body”) raises the threshold, an effect that matters whenever multiple MOSFETs share a common substrate, as they do in integrated circuits. Temperature also nudges the threshold: as a silicon MOSFET heats up, its threshold voltage drifts downward. In power electronics and high-reliability systems, designers account for this shift to ensure the device stays safely off when it is supposed to be off.
Transconductance and Mobility
Transconductance tells you how many additional milliamps of drain current you get for each additional millivolt applied to the gate. A higher transconductance means tighter control, faster switching, and, in amplifier applications, higher voltage gain. It depends on the channel’s carrier mobility, the gate oxide capacitance, and the device geometry.
Carrier mobility deserves a closer look because it is not constant. When a strong electric field pushes carriers against the oxide-semiconductor interface, collisions with the rough surface slow them down. This surface-roughness scattering becomes especially pronounced in modern thin-oxide devices operating at high gate voltages. The result is that transconductance peaks at a moderate gate voltage and then actually declines as you push the gate higher, a behavior sometimes called transconductance degradation.2Solid-State Electronics. Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFETs Designers of analog circuits care about this peak because operating near it maximizes signal gain, while operating well above it wastes gate drive for diminishing returns.
Interface states, which are defects at the boundary between the oxide and the semiconductor, also degrade transconductance. They trap carriers that would otherwise contribute to current flow, effectively reducing how responsive the channel is to the gate. The density of these traps varies with manufacturing process quality, and it is one reason why devices from different fabrication lines can behave noticeably differently even when their datasheets look similar.
On-Resistance in Power MOSFETs
For a MOSFET used as a power switch, the single most scrutinized characteristic is the on-state resistance, usually written as RDS(on). When the device is fully turned on, this resistance determines how much power is wasted as heat. A lower RDS(on) means less conduction loss, which is why power-MOSFET datasheets put this number front and center.
RDS(on) is not a fixed value. It drops as you increase the gate voltage, because a stronger gate drive creates a denser channel and reduces the channel’s contribution to total resistance. It also depends on temperature: in silicon power MOSFETs, RDS(on) rises as the device heats up, because the carrier mobility in silicon falls with temperature. This positive temperature coefficient is actually useful for paralleling multiple MOSFETs, since a hotter device naturally conducts less current and shares the load more evenly with its cooler neighbors.
Measuring RDS(on) accurately matters for validating device models. One approach involves measuring the full drain-current-versus-drain-voltage curve at several gate voltages and then using numerical analysis to extract the resistance, separating the channel resistance from the parasitic resistances in the drift region and contacts.3Active and Passive Electronic Components. Extraction of RDS(ON) of n‐Channel Power MOSFET by Numerical Simulation Model The total on-resistance in a vertical power MOSFET is the sum of several components stacked in series: the channel itself, the accumulation layer under the gate, the drift region that supports the blocking voltage when the device is off, and the substrate. In high-voltage devices, the drift region dominates RDS(on), which is why higher voltage ratings almost always come with higher on-resistance for a given die size.
How Temperature Changes the Picture
Temperature affects nearly every MOSFET characteristic simultaneously. Threshold voltage drops as temperature rises, carrier mobility falls, and leakage current through the off-state device increases. For silicon MOSFETs, the practical upshot is that a device designed to be safely off at room temperature can start leaking significant current at elevated temperatures if the gate-voltage margin above threshold was thin to begin with.
In silicon carbide (SiC) MOSFETs, which are increasingly common in electric vehicles and industrial power supplies, the temperature story is somewhat different. Studies of 4H-SiC and 6H-SiC MOSFETs show that channel mobility and its temperature dependence vary with the crystal polytype. The 4H and 6H variants of SiC exhibit distinctly different mobility behavior as temperature changes, even though the threshold voltage in both cases shifts in proportion to the density of interface states near the conduction band.4MRS Proceedings. Temperature dependences of channel mobility and threshold voltage in 4H- and 6H-SiC MOSFETs The practical implication is that switching from a silicon MOSFET to a SiC MOSFET in a high-temperature application does not just buy you a higher maximum operating temperature; it also changes how the device’s gain and switching speed drift across the thermal range, and thermal design needs to account for that.
Short-Channel Effects
As transistors have been scaled to ever-smaller dimensions, a collection of unwanted behaviors lumped under “short-channel effects” has become one of the central challenges in semiconductor design. In a long-channel MOSFET, the gate has firm control over the barrier that keeps current from flowing when the device is off. In a very short channel, the drain’s electric field can reach across and lower that barrier on its own, allowing current to leak even when the gate says “off.”
This phenomenon, called drain-induced barrier lowering (DIBL), becomes more pronounced as the channel length shrinks, the gate oxide gets thinner, or the channel doping changes. Simulation work on strained-silicon MOSFETs has mapped out these relationships quantitatively, showing that DIBL can be suppressed by optimizing gate oxide thickness, channel doping, and, in strained devices, the germanium content of the underlying layer.5Procedia Engineering. Study of Drain Induced Barrier Lowering (DIBL) Effect for Strained Si nMOSFET In practical terms, DIBL means the threshold voltage of a short-channel MOSFET is not a single fixed number; it shifts depending on the drain voltage, which complicates circuit design and makes leakage harder to predict.
Other short-channel effects compound the problem. Velocity saturation limits how much current a shorter channel can actually deliver, since carriers hit a speed ceiling in strong electric fields regardless of how much voltage you apply. Hot-carrier injection, where high-energy carriers slam into the oxide and create defects, degrades the device over time. Subthreshold swing, the steepness with which current drops as the gate voltage falls below threshold, worsens in short channels, making it harder to achieve a clean off state. Together, these effects drove the semiconductor industry to move beyond simple planar scaling and toward fundamentally new transistor geometries.
Wide-Bandgap Materials and What They Change
Silicon has been the default MOSFET material for decades, but its physical properties set hard limits on how much voltage a device can block, how fast it can switch, and how hot it can run. Silicon carbide and gallium nitride both have wider bandgaps, which translates to higher breakdown fields, higher thermal conductivity (for SiC), and the ability to operate at temperatures where silicon would fail.
Simulation comparisons of silicon, SiC, and GaN power transistors across breakdown voltage ratings from about 1,200 V up to 15,000 V show that each technology has a sweet spot.6physica status solidi (c). Comparison of silicon, SiC and GaN power transistor technologies with breakdown voltage rating from 1.2 kV to 15 kV At lower voltages (the 600-1,200 V range used in electric-vehicle inverters and server power supplies), SiC MOSFETs and GaN transistors offer dramatically lower switching losses and smaller die sizes compared to silicon devices of the same rating. At very high voltages above several kilovolts, SiC IGBTs and SiC MOSFETs pull ahead of GaN options, which face challenges in achieving vertical architectures for extreme blocking capability.
For the end user, the shift to wide-bandgap devices changes which characteristics matter most. The on-resistance per unit area of a SiC MOSFET can be a fraction of what an equivalent silicon device offers at the same voltage rating, because the drift region that supports the blocking voltage can be thinner and more heavily doped. But the interface quality between SiC and its gate oxide remains a persistent challenge: trap densities at the SiC-oxide interface are generally higher than at the silicon-oxide interface, which means channel mobility in SiC MOSFETs is lower than the material’s bulk mobility would suggest. Improving that interface is one of the most active areas in power-semiconductor research.
From Planar Gates to FinFETs
The MOSFET concept itself dates back further than most people realize. The idea of modulating conductivity in a semiconductor with a transverse electric field appeared in a patent application in 1928 and was confirmed experimentally in 1948, but early devices were impractical because of surface contamination problems. Those problems were solved at Bell Laboratories in 1958, though the lab initially stayed committed to its existing bipolar transistor technology rather than commercializing MOSFETs aggressively.7Engineering Science and Education Journal. The other transistor: early history of the metal-oxide semiconductor field-effect transistor The MOSFET’s triumph came later, when integrated-circuit manufacturing made its self-isolating structure far easier to pack densely than bipolar transistors.
For decades, MOSFETs were planar: the gate sat on top of a flat channel, controlling it from one side. As channels shrank below about 20 nanometers, the gate’s ability to control the channel from only one surface was no longer adequate, and short-channel effects became intolerable. The industry’s answer was to stand the channel on its side as a thin vertical fin, wrapping the gate around three sides. These FinFETs offer stronger electrostatic control, which suppresses DIBL and improves subthreshold behavior. They also provide better power-performance trade-offs and scalability beyond what planar architectures could achieve.8PubMed Central. Comprehensive Review of FinFET Technology: History, Structure, Challenges, Innovations, and Emerging Sensing Applications
The evolution has not stopped at FinFETs. Gate-all-around (GAA) architectures, where the gate wraps completely around a nanowire or nanosheet channel, are the next step in the leading-edge logic roadmap. Each architectural jump is fundamentally an effort to maintain the same core MOSFET characteristics (steep subthreshold swing, high transconductance, low leakage) at dimensions where the planar structure can no longer deliver them. The characteristics themselves have not changed in kind since the first working devices in the 1960s; what has changed, relentlessly, is the engineering required to preserve them.
Reading a Datasheet With All of This in Mind
If you are selecting a MOSFET for a project rather than designing one in a fab, the characteristics above show up as a handful of key datasheet parameters. Threshold voltage tells you how much gate drive you need and how much noise margin you have. Transconductance (or, more commonly, the forward transfer admittance listed as yfs) tells you how responsive the device is in its linear amplification range. RDS(on) tells you how much heat the device will dissipate when fully on. The safe operating area (SOA) diagram, which combines voltage, current, and time limits, sets the boundaries beyond which the device may be damaged.
What datasheets do not always make obvious is how these parameters interact. A MOSFET rated for very low RDS(on) at 10 V gate drive may have a much higher on-resistance at 4.5 V gate drive, which matters if you are running from a low-voltage logic signal. A device with a threshold voltage specified at room temperature might shift enough at high temperature to be uncomfortably close to turning on from noise. And a part with excellent static characteristics can still perform poorly in a switching converter if its gate charge is high, because gate charge determines how much energy it takes to turn the device on and off at speed. Gate charge is not, strictly speaking, a channel characteristic in the way threshold and transconductance are; it reflects the capacitances formed by the gate’s overlap with the source, drain, and channel. But in switching applications, it often matters more than RDS(on) because it dominates switching losses at high frequencies.
Thermal derating curves on the datasheet tie everything together. They show how maximum current and RDS(on) change as the case or junction temperature rises. A MOSFET that looks ideal at 25 °C may lose much of its advantage at the 100 °C junction temperature your board will actually reach in a sealed enclosure. Evaluating a MOSFET based only on headline numbers at room temperature is one of the most common mistakes in power-circuit design. The characteristics that matter are the ones at the temperature, gate voltage, and frequency the device will actually see in service.