A decoupling capacitor is a small capacitor placed next to a chip on a circuit board that acts as a tiny local battery, supplying bursts of current the instant the chip needs them. Without it, the chip would have to pull all its current through long traces back to the main power supply, causing voltage dips and electrical noise that can make digital circuits behave unpredictably. You’ll find these capacitors on virtually every circuit board with an integrated circuit, often as small ceramic rectangles sitting right next to a chip’s power pins.
Why Chips Need Local Energy Storage
Integrated circuits, especially digital ones, don’t draw a steady, predictable current. Every time a processor executes an instruction or a logic gate switches states, it demands a sudden pulse of current from the power supply. These pulses happen millions or billions of times per second. The power supply itself sits far away (relatively speaking) on the circuit board, connected by traces that have their own small resistance and inductance. That distance creates a problem: the supply can’t deliver current fast enough to keep up with rapid switching.
When the chip pulls current faster than the supply can respond, the voltage at the chip’s power pin drops momentarily. This is called voltage sag. If the sag is large enough, the chip can misread a logic signal, corrupt data, or reset entirely. A decoupling capacitor solves this by sitting right at the chip’s power pin, pre-loaded with charge. When the chip demands a burst of current, the capacitor delivers it almost instantly, buying time for the main supply to catch up. When the voltage spikes instead of sagging, the capacitor absorbs the excess energy. It works like a shock absorber for the power rail.
How It Filters Noise
Decoupling capacitors also clean up the power supply by redirecting high-frequency electrical noise to ground. Capacitors have a fundamental property: they block steady DC voltage but allow AC signals (including noise) to pass through. Since noise on a power line is essentially unwanted AC riding on top of the DC supply, the capacitor shunts that noise to ground before it can reach the chip or spread to neighboring circuits.
This is where the name “decoupling” comes from. The capacitor effectively isolates the chip from noise generated elsewhere on the board, and isolates the rest of the board from noise the chip itself generates. Without decoupling, a noisy digital chip could inject interference into a sensitive analog circuit sharing the same power rail. The capacitor breaks that coupling by providing a short, low-resistance path for noise to drain to ground instead of traveling across the board.
Decoupling vs. Bypass Capacitors
You’ll often see the terms “decoupling capacitor” and “bypass capacitor” used interchangeably, and in practice they refer to the same physical component doing the same job. When a distinction is made, it’s about emphasis. A bypass capacitor is described in terms of its filtering role: it bypasses AC noise around a component so only clean DC reaches it. A decoupling capacitor is described in terms of energy storage: it stabilizes voltage by supplying current during demand spikes and absorbing excess during surges. Same capacitor, two ways of looking at what it does.
Common Values and Types
For most digital circuits, the standard local decoupling capacitor is 0.1 µF (100 nanofarads). This value has been the default for decades because it provides effective noise filtering across the frequency range where most digital ICs operate. For chips with higher current demands, 1 µF capacitors are common. Boards also use larger “bulk” capacitors, typically around 10 µF, placed near voltage regulators or shared among a group of chips to handle slower, larger current swings.
The overwhelming favorite for decoupling is the multilayer ceramic capacitor, or MLCC. Ceramic capacitors have very low internal resistance and inductance compared to electrolytic or polymer alternatives, which means they respond faster to high-frequency demands. Their capacitance stays remarkably stable across frequency: ceramic capacitors vary only 8% to 12% over a range from 100 Hz to 100 MHz, while polymer capacitors can drift by 18% to 80% over the same range. Ceramics are also far more reliable. Testing has shown mean time to failure figures ranging from 10,000 to over 1,000,000 years for MLCCs, while electrolytic capacitors are often the first components on a board to fail.
Electrolytic capacitors still appear on boards for bulk decoupling where very large capacitance (above 100 µF) is needed, but designers increasingly replace them with high-value ceramics whenever possible.
Why Placement on the Board Matters
A decoupling capacitor only works well if it’s physically close to the chip it serves. Every millimeter of trace between the capacitor and the chip’s power pin adds inductance, and inductance slows down current delivery, which is exactly what you’re trying to avoid. Research from Missouri University of Science and Technology quantified this: a surface-mount capacitor connected through 10 mils of board depth has about 0.9 nanohenries of connection inductance, but at 40 mils that nearly doubles to 1.9 nanohenries. Those numbers sound tiny, but at the frequencies where digital circuits operate, even a nanohenry of extra inductance meaningfully reduces the capacitor’s effectiveness.
Designers route the capacitor’s pads as close as physically possible to the chip’s power and ground pins, ideally with short, wide traces or direct connections through vias to internal power planes. The goal is to minimize the loop area between the capacitor, the chip’s power pin, and ground, because a smaller loop means less inductance and less radiated electromagnetic interference.
Using Multiple Capacitors Together
High-performance designs don’t rely on a single decoupling capacitor per chip. Instead, designers place several capacitors of different values in parallel. A 10 µF capacitor handles low-frequency voltage fluctuations, a 0.1 µF capacitor covers the mid-range, and sometimes a smaller value like 10 nF or 1 nF targets very high frequencies. Each value is most effective at filtering noise near its own natural resonant frequency, so combining them creates a broader, flatter low-impedance path across a wide frequency range.
Simply stacking identical capacitors next to each other doesn’t help as much as you might expect. Research has shown that placing two identical decoupling capacitors very close together reduces effective inductance by only about 15%. The benefit increases as the capacitors are spread farther apart around the chip, with optimal results when they’re positioned roughly 90 degrees apart relative to the power pin. This is why you’ll see capacitors distributed around all sides of a large processor or FPGA rather than clustered on one edge.
What Happens at High Frequencies
Every real capacitor has a frequency limit. Internally, a capacitor isn’t just capacitance. The leads and internal conductors add a small amount of inductance (called equivalent series inductance, or ESL) and resistance (equivalent series resistance, or ESR). Together, these parasitic elements turn the capacitor into a resonant circuit. At one specific frequency, called the self-resonant frequency, the capacitor reaches its lowest impedance and works best. Below that frequency it behaves like a normal capacitor. Above it, the internal inductance takes over and the component starts acting like an inductor, becoming less effective at filtering noise.
This is the core reason designers use multiple capacitor values in parallel. A 10 µF capacitor might self-resonate around 1 MHz, while a 0.1 µF ceramic resonates closer to 20 MHz, and a tiny 100 pF capacitor resonates well into the hundreds of megahertz. By combining them, the design maintains low impedance across a much wider band than any single capacitor could cover alone. Choosing capacitors with low ESL, such as small-footprint ceramics, pushes the self-resonant frequency higher and extends the useful range of each individual part.