A tristate buffer is a digital circuit with three possible output states: logic 1 (high), logic 0 (low), and a third state called high impedance, often written as Hi-Z. That third state is what makes it special. In Hi-Z mode, the output is effectively disconnected from the circuit, as if the wire were physically removed. This allows multiple devices to share a single data line without interfering with each other.
The Three States
A standard digital gate can only output a 1 or a 0. A tristate buffer adds a third option: it can electrically disconnect its output entirely. In this high-impedance state, the output draws almost no current and doesn’t push the signal high or low. It simply lets go of the wire, allowing another device to take control of it.
This matters because in most digital systems, you can’t have two outputs driving the same wire at the same time. If one tries to push the line high while another pushes it low, you get an undefined voltage and wasted current as the two fight each other. Tristate buffers solve this by ensuring that only one device drives the line at any given moment, while the others sit in Hi-Z and stay out of the way.
How the Enable Pin Works
Every tristate buffer has an enable input in addition to its data input. The enable pin controls whether the buffer is active (passing data through) or in Hi-Z (disconnected). When the buffer is enabled, it works like a simple pass-through: a 0 on the input produces a 0 on the output, and a 1 produces a 1. When the buffer is disabled, the output goes to Hi-Z regardless of the input.
Tristate buffers come in two flavors depending on how their enable pin is wired:
- Active-high enable: The buffer passes data when the enable pin is 1. When enable is 0, the output is Hi-Z.
- Active-low enable: The buffer passes data when the enable pin is 0. When enable is 1, the output is Hi-Z. On schematics, the active-low version is marked with a small bubble or bar on the enable pin.
The choice between active-high and active-low is a design convenience. Active-low enables are common in chip-select lines because many control signals in digital systems are active-low by convention.
What Happens Inside the Chip
Inside a CMOS tristate buffer, two transistors handle the output: one connects the output to the supply voltage (pulling it high) and another connects it to ground (pulling it low). In normal operation, exactly one of these transistors is on at any time, producing a clean 1 or 0.
The trick for Hi-Z is straightforward: the enable signal controls additional transistors that can turn off both output transistors simultaneously. With neither transistor conducting, the output pin has no connection to the supply or to ground. It floats, presenting very high resistance to anything connected to it. That high resistance is where the name “high impedance” comes from.
Buffer circuits designed for driving long wires or chip outputs place the driving transistors directly between the output and the power rails rather than stacking them in series with other transistors. This gives them stronger drive capability, which is why tristate buffers are commonly used as line drivers on data buses.
Where Tristate Buffers Are Used
The most common application is a shared data bus. In a computer, the CPU, memory, and peripheral chips all need to send data over the same set of wires. Each device’s output connects to the bus through tristate buffers. At any moment, only one device has its buffers enabled, so only that device drives the bus. Everyone else sits in Hi-Z.
A widely used example is the 74HC244, an octal tristate buffer that handles eight lines at once. It adds a propagation delay of roughly 9 to 13 nanoseconds, meaning signals pass through in under 15 billionths of a second. That speed is fast enough for most parallel bus applications, though modern high-speed serial links have largely replaced shared buses in newer designs.
Tristate buffers also appear in memory chips, microcontroller I/O pins, and FPGAs. Any time multiple sources need to share a wire and take turns driving it, tristate logic is a natural fit.
Tristate vs. Open-Collector Outputs
Open-collector (or open-drain) outputs are another way to let multiple devices share a line, but they work differently. An open-collector output uses a single transistor that can only pull the line low or disconnect. It can never actively drive the line high. Instead, a pull-up resistor connected to the supply voltage passively pulls the line high when no device is pulling it down.
This makes open-collector outputs useful for “wired-AND” connections, where the shared line stays high unless any device pulls it low. Protocols like I²C and 1-Wire rely on this approach. It also makes it easy to connect devices running at different voltages, since the pull-up resistor sets the high voltage level independently.
Tristate buffers, by contrast, can actively drive the line both high and low. This means faster switching and cleaner signals, since the output isn’t relying on a resistor to slowly pull the voltage back up. The tradeoff is that you need careful control logic to ensure only one device drives the bus at a time. If two tristate outputs are accidentally enabled simultaneously, they can fight each other, producing unpredictable voltages and potentially damaging the chips. Open-collector outputs don’t have this risk because they can only pull low, never push high.
In practice, tristate buffers dominate parallel data buses where speed matters, while open-collector outputs are preferred for shared control lines and multi-voltage systems where simplicity and safety are more important than raw switching speed.