An LDO (low-dropout) regulator is a type of linear voltage regulator that can maintain a steady output voltage even when the input voltage is only slightly higher than the output. The “low dropout” refers to the small voltage difference needed between input and output for the regulator to work properly, often as low as 200 mV or less in modern designs. This makes LDOs ideal for battery-powered devices and noise-sensitive circuits where every fraction of a volt counts.
How an LDO Regulator Works
At its core, an LDO has three main components: a voltage reference, an error amplifier, and a pass transistor. The pass transistor acts like an adjustable valve that controls how much current flows from the input to the output. The error amplifier constantly compares the actual output voltage (fed back through a resistor divider) to a precise internal reference voltage. If the output dips below the target, the amplifier opens the pass transistor wider, allowing more current through. If the output creeps too high, it tightens the valve.
This forms a continuous feedback loop that reacts in real time to changes in load current or input voltage. Unlike a switching regulator, which chops the input voltage on and off thousands of times per second, an LDO operates in a purely linear fashion. There’s no switching noise, no high-frequency ripple, and no need for inductors. The tradeoff is that any excess voltage between input and output gets burned off as heat.
What “Dropout Voltage” Actually Means
Dropout voltage is the minimum difference between input and output voltage that the regulator needs to keep working. Once the input drops below this threshold, the LDO can no longer hold the output steady, and the output starts falling with the input. In this “dropout region,” the pass transistor is fully on and behaves like a simple resistor. The dropout voltage is essentially the current multiplied by that resistance.
A practical example: a 3.3 V LDO with a 350 mV dropout at 1 A needs at least 3.65 V on the input. If the input falls below that, regulation is lost. Below roughly 2 V, the device stops functioning entirely. Cutting-edge designs have pushed dropout voltages down to 67 mV, which is especially valuable in battery-powered applications where squeezing every bit of energy from a depleting cell matters.
Efficiency and Heat
An LDO’s efficiency is straightforward to calculate: it’s roughly the output voltage divided by the input voltage. If you’re converting 5 V to 3.3 V, your efficiency is about 66%, and the remaining 34% becomes heat. The power dissipated follows a simple formula: multiply the voltage difference (input minus output) by the output current. Converting 5 V to 3.3 V at 1 A means the LDO dissipates 1.7 watts.
That heat has to go somewhere. The junction temperature of the regulator chip equals the power dissipated multiplied by the thermal resistance of its package, added to the ambient temperature. In a small surface-mount package with poor heat sinking, 1.7 watts can push the chip past its safe operating temperature quickly. This is why LDOs work best when the input-to-output voltage gap is small. Converting 3.6 V to 3.3 V at the same 1 A only dissipates 0.3 watts, a much more manageable number.
To maximize efficiency, you want to minimize both the dropout voltage and the quiescent current (the small amount of current the LDO consumes just to run its own internal circuitry). In battery-powered devices that spend most of their time in sleep mode, a low quiescent current can meaningfully extend battery life.
Why Noise Performance Matters
The biggest reason engineers choose an LDO over a switching regulator isn’t efficiency. It’s noise. Because an LDO has no switching action, its output is remarkably clean. Typical output noise specs land around 25 microvolts RMS over a 1 kHz to 100 kHz bandwidth, far below the switching transients and harmonics produced by a buck converter.
LDOs also excel at rejecting noise already present on the input, measured by a specification called power supply rejection ratio (PSRR). PSRR tells you how well the regulator prevents ripple on the input from reaching the output, expressed in decibels. A higher number means better rejection. Input ripple can come from many sources: 50/60 Hz interference from mains power, output ripple from an upstream switching converter, or noise coupled from other circuits on the same board. PSRR is measured across a frequency range, typically 10 Hz to 1 MHz, and it degrades at higher frequencies.
Some LDOs include a bypass pin that lets you connect an external capacitor to filter noise from the internal voltage reference, which is the primary source of output noise in most designs.
PMOS vs. NMOS Pass Transistors
Most LDOs use a PMOS transistor as the pass element because it achieves lower dropout voltages without extra circuitry. An NMOS-based LDO typically needs a charge pump to drive the gate above the input voltage, which adds silicon area and introduces switching noise at the output.
NMOS designs do have advantages, though. They respond faster to sudden load changes, recovering from current spikes in under a microsecond compared to roughly 1.5 microseconds for a comparable PMOS design. NMOS LDOs also tend to reject power supply noise more effectively across a wider range of load currents. In one comparative study, an NMOS design achieved better than -50 dB of rejection at both light and heavy loads, while the PMOS version dropped to -33 dB under full load.
The practical takeaway: PMOS LDOs are the default choice for most applications because of their simplicity and low dropout. NMOS designs show up in specialized cases where transient response or noise rejection at full load is the priority.
LDO vs. Switching Regulators
A buck (step-down) switching converter can achieve 90% efficiency or higher regardless of the input-to-output ratio, so it wins on paper in almost every power calculation. But LDOs remain the better choice in several common situations:
- Small voltage difference: When the input is only a few tenths of a volt above the output, an LDO’s efficiency approaches that of a switcher, and it does so with fewer components, smaller board space, and lower cost.
- Low current loads: At milliamp-level currents, the power wasted as heat is trivially small, and the added complexity of a switching converter isn’t justified.
- Noise-sensitive circuits: RF systems, phase-locked loops, high-speed data converters, and precision analog front ends all suffer when power supply noise bleeds into the signal path. Ultralow-noise LDOs are standard in 5G wireless, aerospace and defense, and medical instrumentation for exactly this reason.
A common design pattern in noise-sensitive systems is to use a switching regulator first for efficient bulk conversion, then follow it with an LDO to clean up the remaining ripple before it reaches sensitive components. This “buck plus LDO” topology gives you the efficiency of switching with the clean output of linear regulation.
Stability and Output Capacitor Selection
An LDO’s feedback loop creates a control system with two critical frequency points (called poles): one internal to the error amplifier and pass transistor, and one external, set by the output capacitor and its equivalent series resistance (ESR). If these poles interact badly, the regulator can oscillate, producing ripple or instability on the output.
The output capacitor’s ESR plays a dual role. Some ESR is actually helpful because it creates a stabilizing zero in the frequency response. But too much ESR pushes the external pole to a frequency that threatens stability. Too little ESR, common with ceramic capacitors, can remove the stabilizing effect entirely. Every LDO datasheet specifies a range of acceptable output capacitance and ESR values. Ignoring these specs is one of the most common causes of unstable LDO behavior in real circuits. Many modern LDOs are designed to be stable with low-ESR ceramic capacitors, but always check the specific part’s requirements.