Chip manufacturing is the process of turning raw silicon into the tiny processors and memory chips that power phones, computers, cars, and nearly every modern electronic device. It involves hundreds of precise steps carried out over 12 weeks to six months, from growing a crystal of pure silicon to packaging a finished chip smaller than a fingernail. The process is one of the most complex and expensive forms of manufacturing ever developed.
Starting With Silicon
Every chip begins as sand, specifically the silicon dioxide found in high-purity quartz. That raw material is refined into a cylinder of almost perfectly pure silicon crystal called an ingot. The most common method for growing these ingots is the Czochralski process: a small seed crystal is dipped into a vat of molten silicon and slowly pulled upward while rotating. As it rises, silicon atoms arrange themselves into a single continuous crystal structure that can be several feet long.
Growing a flawless crystal is harder than it sounds. Defects called “structure loss” are most likely in the first 600 millimeters of growth, especially in the first ingot produced from a fresh quartz crucible. Temperature control is critical, since low thermal gradients at the growth front significantly increase failure rates. Once an ingot passes inspection, it is sliced into thin discs called wafers, each polished to a mirror finish. These wafers, typically 300 millimeters (about 12 inches) in diameter, serve as the canvas for everything that follows.
Printing Patterns With Light
The defining step of chip manufacturing is lithography, the process of projecting circuit patterns onto a wafer using light. A light-sensitive coating is applied to the wafer, then a beam of light shines through a stencil-like mask that contains the circuit design. Wherever light hits the coating, it changes chemically, allowing the exposed (or unexposed) areas to be washed away. What remains is a precise pattern that guides the next round of material removal or addition.
The smallest features a factory can print depend on the wavelength of light it uses. Older systems use deep ultraviolet (DUV) light at 193 nanometers. The most advanced factories now use extreme ultraviolet (EUV) light at just 13.5 nanometers, roughly 14 times shorter. That shorter wavelength can define features only a few nanometers wide, which is how manufacturers achieve the 3nm and 2nm process nodes used in today’s fastest chips. EUV light is absorbed by air and glass, so these machines use mirrors in a vacuum chamber instead of traditional lenses. A single EUV machine costs well over $100 million.
Building Transistors Layer by Layer
A finished chip can contain billions of transistors, the tiny switches that represent the ones and zeros of digital computing. These transistors are built directly into the silicon wafer during what’s known as front-end processing. This stage alternates between three core techniques: depositing new material, etching material away, and doping (injecting atoms to change the silicon’s electrical properties). Each technique is repeated dozens of times, with lithography defining the pattern for each layer.
Deposition adds thin films of materials like metal or insulating oxides onto the wafer surface. Etching then selectively removes portions of those films to create the desired shapes. Modern chips rely on dry etching, where gases are turned into a plasma inside a vacuum chamber. The charged particles in that plasma strike the wafer surface with enough energy to physically knock atoms loose while also reacting chemically with the material. This combination of physical bombardment and chemical reaction allows manufacturers to carve features with nearly vertical sidewalls, which is essential when structures are only a few nanometers wide. One widely used approach, the Bosch process, alternates between etching silicon and depositing a thin protective film, enabling deep, narrow trenches with precise control.
After all the transistor layers are formed, the back-end process connects them. Thin metal wires and insulating layers are stacked on top of one another to route electrical signals between billions of transistors. A complex chip can have more than a dozen of these interconnect layers.
Keeping the Air Perfectly Clean
Because chip features are far smaller than a speck of dust, fabrication takes place in cleanrooms with extraordinary air purity standards. The most sensitive areas, where lithography and deposition happen, require ISO Class 3 or Class 4 environments. An ISO Class 3 cleanroom allows no more than 35 particles of 0.5 micrometers or larger per cubic meter of air. For comparison, the air in a typical office building contains millions of such particles per cubic meter. General manufacturing areas in a fab operate at ISO Class 5 or higher. Workers wear full-body suits, and air is continuously filtered and recirculated to maintain these conditions.
From Wafer to Individual Chips
A single wafer holds hundreds or even thousands of identical chips, called dies. Once front-end and back-end wafer processing is complete, every die is tested while still on the wafer. Dies that fail are marked and discarded later. The wafer is then cut apart in a process called dicing: a precision saw or laser separates the individual dies while water washes away silicon dust and keeps the blade cool.
Each good die then goes through packaging and assembly. First, the die is mounted onto a small frame called a leadframe or substrate. Next, wire bonding creates the electrical connections between the die and the package’s external pins. The most common method, thermosonic bonding, uses gold or copper wire. An electric spark melts the tip of the wire into a tiny ball, which is pressed onto a contact point on the die. The wire is then looped upward and brought down to a matching contact on the leadframe, forming a wedge bond. Each chip can require hundreds of these connections.
Finally, the assembled chip is encapsulated in a protective mold compound. A pellet of resin is heated until it liquefies, then forced into a mold cavity that surrounds the die and its wire bonds. The compound hardens through a curing process, first in the mold and then in an oven, forming the tough plastic shell you see on a finished chip. This shell protects the delicate silicon from moisture, dust, and physical damage. The entire back-end process of dicing, bonding, molding, and final testing adds another 4 to 8 weeks to the production timeline.
Who Makes the World’s Chips
Most companies that design chips don’t manufacture them. Instead, they send their designs to a foundry, a specialized factory that builds chips on contract. TSMC, based in Taiwan, dominates this market with roughly 64% of global foundry revenue as of 2024. Samsung holds about 9%, and smaller foundries split the remainder. When you look at the broader semiconductor industry (including companies that make and sell their own chips), Samsung leads with a 10.6% market share, followed by Intel at 7.9%.
The race to build smaller, faster transistors is relentless. TSMC began volume production of its 2-nanometer chips in the fourth quarter of 2025, with an enhanced version of that process scheduled for the second half of 2026. These advanced nodes require billions of dollars in factory construction and equipment, which is why only a handful of companies in the world can compete at the leading edge. A single modern fab can cost $20 billion or more to build and equip.
Why It Takes So Long
From blank wafer to finished product, a complex chip takes an average of 12 weeks to over 6 months to manufacture. The wafer itself may pass through a thousand or more individual processing steps, with each lithography-etch-deposition cycle adding time. Transportation between facilities adds further delays, since wafer fabrication, assembly, and testing often happen in different countries. This extended timeline is one reason chip shortages can take so long to resolve: even after a factory ramps up production, months pass before new chips reach customers.