dv/dt is the rate of change of voltage over time, expressed in volts per second. It comes from calculus notation, where “d” represents an infinitesimally small change. So dv/dt literally means “a tiny change in voltage divided by a tiny change in time.” If voltage is rising quickly, dv/dt is a large positive number. If voltage is steady, dv/dt is zero.
This concept matters most in electronics and power systems, where rapid voltage changes can drive current through capacitors, damage insulation, and cause semiconductors to malfunction. Understanding dv/dt helps explain why some circuits need protection against fast voltage swings.
The Basic Math Behind dv/dt
In calculus, dv/dt is the derivative of voltage with respect to time. A derivative captures the instantaneous rate of change at a specific moment, not just the average change over some interval. If you plot voltage on a graph with time on the x-axis, dv/dt is the slope of that curve at any given point.
A slowly rising voltage might have a dv/dt of a few volts per second. The output of a modern power transistor switching on can have a dv/dt measured in thousands of volts per microsecond (kV/μs). That difference, several orders of magnitude, is why dv/dt becomes a critical design parameter in fast-switching circuits.
Why dv/dt Matters for Capacitors
The most fundamental application of dv/dt is in the relationship between voltage and current in a capacitor. A capacitor stores energy in an electric field between two plates. The current flowing through it is directly proportional to how fast the voltage across it is changing. The formula is:
i = C × (dv/dt)
Here, “i” is the current, “C” is the capacitance, and dv/dt is the rate of voltage change. This means a capacitor with a constant voltage across it passes zero current. But if voltage changes rapidly (high dv/dt), even a tiny capacitor can conduct significant current. This is why capacitors block DC (zero dv/dt) but pass AC signals, and why faster-changing signals pass through more easily.
This relationship also works in reverse: if you force a known current through a capacitor, the voltage across it changes at a predictable rate. That principle is the basis for timing circuits, integrators, and many analog signal-processing circuits.
Parasitic Turn-On in Semiconductors
In power electronics, high dv/dt is a serious reliability concern. Power transistors like IGBTs and MOSFETs have tiny internal (parasitic) capacitances between their terminals. When a rapid voltage change occurs across the device, current flows through these internal capacitances, just as the capacitor formula predicts.
That unwanted current can raise the voltage at the transistor’s control terminal. If the voltage spike exceeds the threshold needed to switch the device on, it turns on by itself, without any command from the control circuit. This is called parasitic turn-on or dv/dt-induced self turn-on. In a circuit where two transistors are stacked (one high-side, one low-side), both can end up conducting at the same time, creating a short circuit through the power supply. This “shoot-through” event can destroy components instantly.
Several factors make this worse: higher dv/dt rates generate larger displacement currents. Larger parasitic capacitance between the output and control terminals amplifies the effect. Higher resistance in the gate drive circuit prevents the unwanted charge from draining away quickly, letting the voltage spike build. Circuit designers manage this by choosing appropriate gate resistors, adding clamp circuits, or selecting transistors with lower internal capacitance ratios.
Motor Insulation Damage From High dv/dt
Variable frequency drives (VFDs) control motor speed by generating a series of fast-switching square wave pulses that approximate a sine wave. These pulses have extremely high dv/dt values because the voltage rises from zero to full bus voltage in microseconds or less.
This creates two problems for the motor connected to the drive. First, the fast-rising voltage pulses travel down the cable to the motor and can reflect back, producing voltage overshoots that exceed the original pulse amplitude. Second, high dv/dt causes the voltage to distribute unevenly across the motor’s windings. With very fast rise times, up to 85% of the total voltage can appear across just the first and second turns of the winding, rather than spreading evenly across all turns.
That concentrated voltage stress causes small electrical breakdowns in any air-filled voids within the insulation material. Each individual breakdown, called a partial discharge, is minor on its own. But repeated thousands of times per second, these discharges gradually erode the insulation from the inside out. Motors not rated for inverter duty can fail prematurely when driven by modern VFDs with fast-switching transistors. Solutions include using inverter-rated motors with reinforced insulation, adding output filters to slow down the voltage rise, or installing reactors between the drive and motor to reduce dv/dt.
How dv/dt Is Measured
The standard tool for measuring dv/dt is an oscilloscope. You capture the voltage waveform, then calculate the slope of the rising or falling edge. The simplest approach is to measure the voltage change between two points on the edge (typically the 20% and 80% levels) and divide by the time between them.
A more efficient method uses the oscilloscope’s built-in math channel to differentiate the voltage waveform automatically. This converts edge steepness from the time domain into an amplitude that you can read directly on the y-axis, scaled to kV/μs. The advantage is that you don’t have to manually measure each switching edge. Instead, you capture a full cycle of operation and read the peak dv/dt values from the differentiated waveform.
Sampling rate matters. The oscilloscope needs enough resolution to capture the actual shape of the voltage edge. A practical guideline is to choose a sampling interval that places about four samples within the rise time. For a 32-nanosecond edge, that means sampling at roughly 8-nanosecond intervals. If the sampling is too coarse, the measurement only captures the average slope between sample points and misses any steeper sections within the edge. This can lead to underestimating the true dv/dt, which in turn underestimates the stress on connected components.