Memory bandwidth is the maximum rate at which data can be read from or written to memory, measured in gigabytes per second (GB/s). It determines how quickly your processor, whether a CPU or GPU, can access the data it needs to do work. A single DDR5 memory channel running at 6,400 megatransfers per second delivers about 51 GB/s, while a high-end AI accelerator like the NVIDIA H200 reaches 4,800 GB/s (4.8 TB/s) using specialized memory stacks.
How Memory Bandwidth Is Calculated
Three factors determine memory bandwidth: clock speed, bus width, and transfers per clock cycle. Multiply them together and you get the theoretical peak. For a concrete example, take a memory interface running at 1.1 GHz with a 64-bit bus using DDR (which transfers data twice per clock cycle): 1.1 billion cycles × 8 bytes × 2 transfers = roughly 17.6 GB/s.
The same math works for any memory type. DDR5 running at 8 gigatransfers per second on a 64-bit bus gives you about 64 GB/s per channel. Desktop systems typically run two channels, doubling that to around 128 GB/s of peak theoretical bandwidth.
MT/s vs. MHz: Why the Numbers Are Confusing
You’ll see memory speeds listed in both megahertz (MHz) and megatransfers per second (MT/s), and they’re not the same thing. MHz measures the actual clock frequency, meaning how many times per second the memory’s transistors switch states. MT/s measures how much data actually moves per second. Because DDR memory transfers data on both the rising and falling edges of each clock cycle, it moves twice as much data as the raw frequency would suggest.
A stick of RAM advertised as “3600 MHz” is actually running at 1,800 MHz and delivering 3,600 MT/s. The industry has been loose with this labeling for years, but the distinction matters when you’re comparing specifications across different memory types. MT/s gives you a more direct picture of actual throughput.
Why You Rarely Get Peak Bandwidth
The numbers on the box are theoretical maximums. Real-world bandwidth is almost always lower, sometimes significantly. The gap comes down to how data is organized in memory and how efficiently the processor requests it.
When software accesses data stored in neat, sequential blocks, the memory system can stream it efficiently and get close to peak bandwidth. When access patterns are scattered or random, performance drops because the system wastes time hunting for data across different memory locations. Poor spatial locality in caches, alignment issues, and insufficient prefetching (where the system tries to predict and pre-load data before it’s needed) all eat into effective bandwidth. In the worst case of truly random memory access, throughput can fall dramatically.
Single-Channel vs. Dual-Channel Performance
Most desktop CPUs support dual-channel memory, meaning two sticks of RAM working in parallel to double the available bandwidth compared to a single stick. The real-world impact varies wildly depending on the task.
In raw memory throughput tests, dual-channel configurations show a clear advantage: roughly 31% faster memory copies, 27% faster reads, and 15% faster writes, with total measured bandwidth about 21% higher. But that doesn’t always translate proportionally into application performance. Benchmarks from Gamers Nexus found that video transcoding in Handbrake improved by about 4.4% with dual-channel, Adobe After Effects RAM previews ran about 6% faster, and file compression in WinRAR gained roughly 3%. Gaming showed essentially zero difference in frame rates. The takeaway: dual-channel matters most for memory-intensive creative workloads and matters least for tasks where the GPU does the heavy lifting.
GPU Bandwidth vs. System Memory
Graphics cards need far more bandwidth than CPUs because they process massive amounts of visual data in parallel. For high-resolution gaming at 1440p or 4K, higher bandwidth allows faster texture loading and smoother frame rates. Professional workloads like 3D rendering and video editing benefit for similar reasons, since large assets need to move between memory and processing cores constantly.
The bandwidth gap between system RAM and GPU memory is enormous. A desktop DDR5 setup might deliver 100 GB/s or so in dual-channel mode. A mid-range graphics card typically offers 200 to 400 GB/s. For machine learning and visual computing workloads, a practical starting point is around 300 to 500 GB/s.
HBM: The Bandwidth King
High Bandwidth Memory (HBM) takes a completely different approach from traditional memory. Instead of chips laid out on a circuit board, HBM stacks memory dies vertically and connects them through thousands of tiny pathways, creating an extremely wide data bus in a compact package. A single HBM3e stack uses a 1,024-bit interface, compared to 64 bits for a DDR5 channel, and delivers about 1.2 TB/s per stack.
That’s more than 20 times what a single DDR5 channel provides. The NVIDIA H200 accelerator packs 141 GB of HBM3e memory with a combined bandwidth of 4.8 TB/s. This kind of throughput is essential for AI workloads, where models with billions of parameters need to stream weights through the processor continuously.
Memory Bandwidth as the AI Bottleneck
For large language models, memory bandwidth has become the primary performance constraint, not raw computing power. During inference (when the model generates responses), most of the GPU’s compute units sit idle because they’re waiting for data to arrive from memory. Research analyzing GPU utilization during large-batch inference found that over 50% of processing cycles for attention operations were stalled due to memory access delays. The arithmetic intensity of these operations stays nearly constant regardless of batch size, meaning performance is fundamentally limited by how fast data can be read from memory, not how fast it can be processed.
This is why AI accelerator design has shifted toward maximizing memory bandwidth rather than simply adding more compute cores. The bottleneck isn’t doing the math; it’s feeding the math engine fast enough.
What’s Coming With DDR6
DDR6 is expected to arrive around 2027 with starting speeds of 8,800 MT/s, nearly double DDR5’s initial launch speed of 4,800 MT/s. Roadmaps project speeds scaling up to 17,600 MT/s, with some projections reaching a theoretical ceiling near 21,000 MT/s. At the high end, each 64-bit channel would deliver about 140.8 GB/s, roughly 2.2 times the best-case DDR5 performance.
The architecture is also changing. DDR6 moves to four 24-bit sub-channels per module instead of DDR5’s two 32-bit sub-channels, which improves efficiency by allowing more independent memory operations to happen simultaneously. The goal, according to JEDEC (the industry standards body), is roughly double the throughput per channel while improving energy efficiency per bit transferred.